This online video is component of TechXchange: Chiplets – Digital Design Automation Insights and TechXchange Talks.
AMD has concluded its acquisition of Xilinx, and its complementary chip-packaging engineering is permitting AMD to integrate heterogeneous chiplets into a one deal. This trend has been rising for some time since it enables elements crafted with distinct concentrations of silicon processes to be mixed into a one device. It truly is been made use of to link higher bandwidth memory (HBM) to GPUs and CPUs.
A amount of techniques can be applied from silicon interposers to elevated-fanout-bridge (EFB) relationship. Mark Papermaster, CTO at AMD, talks about (in the online video higher than) the company’s new Zen 4 CPU chiplet as nicely as some of the chip-level interconnects like EFB becoming utilised by AMD/Xilinx in latest and future chips (Fig. 1).
EFB is a lessen overhead technique than a silicon interposer. This is much more akin to making use of a jumper rather than a comprehensive PCB at the module amount, except that an EFB usually has hundreds of connections (Fig. 2). Both equally have a tendency to be referred to as 2.5D connections, due to the fact chiplets are adjacent versus the 3D stacking observed in memory chips like HBM RAM and flash-memory stacks.
The 3D hybrid bonding that Mark handles is a way to stack different chiplets, but a copper-to-copper relationship was employed alternatively of the silicon/metallic connections. It’s quite electricity-economical and gives substantial-density, minimal-latency connections. This hybrid 3D technologies is now employed by AMD in some of its recent choices.
Foundries like TSMC and GlobalFoundries are supporting 2.5D and 3D technologies. They are essential to get edge of other higher-density systems like HBM that use by means of silicon vias (TSV) to apply their 3D stacking.
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